Please refer to FIG. 1, which is a circuit diagram showing a conventional display panel driver according to the prior art. In FIG. 1, the display panel driver 1 includes a digital/analog converter and a gain stage. The digital/analog converter is a 6-bit digital/analog converter 10 and the gain stage is an OP AMP 11. A digital/analog output signal outputted from the 6-bit digital/analog converter 10 is amplified by the OP AMP 11 to become an output voltage signal so as to drive a display panel 12.
The display panel driver shown in FIG. 1 has at least the following two drawbacks:
(1) Bad Linearity
The source voltage VDD used by the system is generally 3.3˜5 volt. The digital/analog converter 10 is a low-voltage element and the OP AMP 11 is a high-voltage element. Since the smallest least significant bit (LSB) of the digital/analog converter 10 is VDD/26, the largest LSB is 78.125 mV. However, the smallest common mode input voltage of the OP AMP 11 is usually over 1 V. The difference makes the range of the common mode input voltage become small. Therefore, a higher input voltage is needed to make the transistors in the OP AMP 11 be operated in saturation region. Please refer to FIG. 2, which is a curve diagram showing the sum of the output of the digital/analog converter and the outputs of the gain stage relating to the input code, wherein the longitudinal coordinate axis represents the sum of the output of the digital/analog converter and the output of the gain stage (unit: volt) and the abscissa axis represents the input code (unit: LSB). It is clear from FIG. 2 that nearly a quarter of the input codes have worse linearity, especially those in the range of the small voltages.
(2) Large Chip Size
Since the OP AMP 11 is a high-voltage element and has a large rule, every channel needs a digital/analog converter and a buffer. Therefore, the chip size gets large.
For the above problems, it is clear that the performance of the conventional display panel driver fails to meet the needs of the users.